Method and apparatus for reducing frequency errors associated with an inter-system scan

ABSTRACT

A plural-mode receiver  10  is able to receive signals from a first communication system (e.g. WCDMA) or signals from a second, different communication system e.g. GSM). The receiver  10  comprises a first receiver chain  13, 15,17,19  for receiving signals of the first communication system and a second receiver chain  12, 14, 16, 18  for receiving signals of the second communication system. A reference oscillator  24  is arranged to generate a reference signal for the first receiver chain and the second receiver chain. The receiver also comprises a controller  22  for controlling the reference oscillator  24  so that the oscillator  24  oscillates at frequencies related to signals of the first communication system or signals of the second communication system. The controller  22  records the change in frequency of the oscillator  24  resulting from changing to the frequencies related to signals of the second communication system and a period of time during which signals of the second communication system are received by the second receiver chain. The controller  22  then calculates from the recorded change and the recorded period of time an error vector and changes parameters of the reference oscillator  24,  including applying the calculated error vector, so that the oscillator oscillates at frequencies related to signals of the first communication system.

BACKGROUND OF THE INVENTION

I. Field of the Invention

The invention relates generally to a method of and apparatus forreducing frequency errors associated with an inter-system scan. Theinvention is useful for reducing frequency error when performing anintersystem scan between a continuous frequency division duplex system,for example a WCDMA system, and a differently duplexed system, forexample a time division duplex system such as GSM, but is not limited tosuch an application.

II. Description of the Related Art

In the following, reference will be made to the WCDMA and GSM standards,but it will be appreciated by those possessed of the relevant skillsthat the invention is not limited to those standards and may be appliedto inter-system scans between other different communication systems. Theterms “mobile unit” and “mobile phone” are also used and, of course,cover mobile phones, but also cover other devices capable ofcommunicating with a cellular system in the transfer of voice orinformation data.

Most if not all equipment used in communications systems includes aninternal frequency reference circuit that is adjustable to allow theequipment to adjust the timing of its operations to align with that ofother equipment within the communications system. For example in acellular telephone system the mobile units include a reference frequencycircuit, which is commonly an adjustable oscillator whose outputfrequency can be trimmed within a specified range using an controlvoltage input, to enable the timing within the mobile unit to be alignedwith that of the serving cell or network. The frequency referencecircuit is commonly a phase-locked loop based around a voltagecontrolled temperature compensated crystal oscillator (VCTCXO), anaccurate oscillator that allows the range to be specified in terms ofparts per million (ppm).

The mobile unit will, of course, be in communication with the systemwhen it is active during a call. The system needs to “know” where themobile unit is when it is not receiving or making a call so thatincoming messages can be sent to it. Mobile units therefore continue tooperate in an idle mode when a call is not being made so that data can-be paged to it from time to time. The mobile unit has to maintain timealignment with the WCDMA system, in order to correctly monitor forpaging data from the system for the mobile unit. The VCTCXO andphase-locked loop are usually very accurate and need only be subjectedto very minor corrections, essentially remaining at a constant frequencywhile the phone remains in active or idle communication with the system.

During certain situations, for example when leaving the coverage area ofan initial system and entering the coverage area of a new system, itbecomes necessary to monitor the signals of the surrounding cellsbelonging to the new system so that a controlled handover can take placebetween the two systems. While it would be possible to do this fromwithin the system, such an approach would place an undue burden on thesystem because it would have to monitor both active and idle mobileunits. The mobile units themselves therefore do this monitoring.

There are many different standards available for use in cellularcommunications systems including the widely established GSM standard andthe newer CDMA standards including WCDMA. System users expect to havecontinuous service even when they roam outside the area of coverage ofthe service company to which they subscribe. In order to meet thisexpectation, so called multi-mode phones have been developed that arecapable of communication in, say, both a WCDMA system and a GSM system.

The continuous nature of WCDMA signals means that there is no naturalbreak in the signals that would allow scanning for signals from othersystems. Furthermore, there is no common synchronization between a WCDMAsystem and a GSM system. Different systems are asynchronous in thatthere is no predefined relationship between the timing and phase of thesignals of the systems.

One way of overcoming this would be to apply a post-reception phasecorrection to the data before decoding is done. This could be done byusing a hardware rotator to correct for phase offset as the receiveddata is sampled, i.e. receive a sample, rotate it and then store it inmemory for decoding. A problem with this approach is that a hardwarerotator requires additional hardware, and hence uses extra silicon area,and therefore adds additional cost and complexity to the circuit (whichis usually provided in the form of an ASIC).

Another way would be to rotate the received samples in memory before thedecoding takes place, i.e. bring in all of the samples and then apply arotation algorithm. A problem with this approach is that a signalprocessing rotation algorithm such as this requires code to be written,memory in which to store it and a DSP (digital signal processor)powerful enough to run it in the required time. This approach thereforeconsumes DSP memory and energy from the battery.

One proposal for the WCDMA standard to overcome this problem is to use amethod known as compressed mode to create “free-space” periods duringwhich the receiver can be re-configured to scan for other systems. Thus,during a free space period, the receiver is tuned to a GSM channel and ameasurement of characteristics of the channel is performed. At the endof a “free-space” period, the receiver must be configured back to theWCDMA channel of the original system in order to ensure uninterruptedservice. In order to do this, the receiver needs to be phase lockedbefore reception is attempted Therefore, the phase-locked loop (or otherreference oscillator) must be re-tuned and re-synchronized both whenchanging the phone from WCDMA to GSM and when changing the phone fromGSM back to WCDMA.

When the phone is retuned to scan for other serving systems, a number ofactions have to occur:

-   -   1. Initialize receiver and re-program PLL to new (GSM)        frequencies.    -   2. Scan for data to give coarse frequency synchronization.    -   3. Scan for data to give fine frequency correction.    -   4. Decode GSM system access parameters.    -   5. Re-configure receiver and re-program PLL to original (WCDMA)        frequencies.    -   6. Re-acquire and re-synchronize to the WCDMA system.

This retuning results in a frequency error being introduced into thesynchronization of the phone to the WCDMA system, making there-acquisition more difficult when returning to the WCDMA channel. Oneproposal for reducing this problem when switching between GSM and WCDMAmodes is to extend the free space period as much as possible for the GSMscan, to minimize the response time of circuits, and to rely on thereceiver to re-synchronize using an frequency or time tracking autofrequency control (AFC) algorithm.

However, this approach is not entirely satisfactory at least for thefollowing reason. When the scanning for data occurs in the above actions2 and 3, the phase-locked loop is fine-tuned using a control voltageinput. This fine-tuning results in a frequency error being introducedinto the synchronization when the phone is reconfigured to return to theWCDMA system in the above action 5. Consequently, the re-acquisition inaction 6 is more difficult to perform.

SUMMARY OF THE INVENTION

The invention addresses the above-discussed and related problems.

According to one aspect of the invention there is provided a method ofcontrolling a plural-mode receiver, capable of receiving signals from afirst communication or signals from a second, different communicationsystem, to reduce frequency errors associated with the receiver scanningfor signals of the second communication system while receiving signalsof the first communication system, the method comprising: changingparameters of a reference oscillator of the receiver so that theoscillator oscillates at frequencies related to signals of the secondcommunication system; recording the change in frequency of theoscillator resulting from the adjustment; receiving signals of thesecond communication system for a period of time; recording the periodof time; calculating from the recorded change and the recorded period oftime an error vector; and changing parameters of the referenceoscillator, including applying the calculated error vector, so that theoscillator oscillates at frequencies related to signals of the firstcommunication system.

According to another aspect of the invention there is provided aplural-mode receiver apparatus for receiving signals from a firstcommunication or signals from a second, different communication system,the apparatus comprising: a first receiver chain for receiving signalsof the first communication system; a second receiver chain for receivingsignals of the second communication system; a reference oscillator forgenerating a reference signal for the first receiver chain and thesecond receiver chain; and a controller for: changing parameters of thereference oscillator so that the oscillator oscillates at frequenciesrelated to signals of the second communication system; recording thechange in frequency of the oscillator resulting from the adjustment;recording a period of time during which signals of the secondcommunication system are received by the second receiver chain;calculating from the recorded change and the recorded period of time anerror vector; and changing parameters of the reference oscillator,including applying the calculated error vector, so that the oscillatoroscillates at frequencies related to signals of the first communicationsystem.

According to a further aspect of the invention there is provided areceiver for receiving signals of a first communication system andsignals of a second communication system, the receiver comprising areceiving circuit tunable to receive signals of the first and secondcommunication systems, the receiver being arranged so that, while tunedto receive signals of the first communication system, the receivingcircuit can be briefly retuned to receive signals of the secondcommunication system before being tuned back to receive again signals ofthe first communication system, and so that a correction is made whentuning back to signals of the first communication system depending ontuning changes made while retuning and receiving signals of the secondcommunication system and the duration of the changes.

The invention also provides a method of receiving signals of a firstcommunication system and signals of a second communication system, themethod comprising tuning a receiving circuit to receive signals of thefirst communication system, retuning the receiver circuit to receivesignals of the second communication system, tuning the receiver back toreceive again signals of the first communication system, determiningtuning changes made while retuning and receiving signals of the secondcommunication system and the duration of the changes, calculating fromthe changes and duration of the changes a correction to be made to thetuning, and making the calculated correction when tuning back to signalsof the first communication system.

As will be appreciated from the following description of a receiver inwhich the invention is embodied, if the reference oscillator is allowedtemporarily to achieve phase lock with the new system and just receivethe samples as normal, i.e. allow the reference oscillator to becomephase locked before starting the received data sampling, then thereceived samples will have the correct phase and no post correction willbe required. This approach requires very little overheads in circuitcomplexity, memory space and energy consumption.

Furthermore, the problem of maintaining phase lock with the continuousfrequency division duplex (e.g. WCDMA) system while temporarilyachieving phase lock with the GSM system is overcome or at leastmitigated by estimating the error induced by retuning to the timedivision duplex (e.g. GSM) system in order to apply a correction for itbefore the WCDMA system is re-acquired. The correction can be computedbefore (or during) the inter-system scan and applied during the receiverreconfiguration period, so that when the WCDMA system is re-acquired,the error will already have been substantially reduced.

The above and further features of the invention are set forth withparticularity in the appended claims and together with advantagesthereof will become clearer from consideration of the following detaileddescription of an exemplary embodiment of the invention given withreference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

FIG. 1 is a schematic circuit diagram of a dual mode receiver for amobile unit;

FIG. 2 is a schematic circuit diagram of a phase-locked loop in thereceiver of FIG. 1;

FIG. 3 is a phase diagram in PN space;

FIG. 4 is a graph showing energy curves in PN space; and

FIG. 5 shows one example of a timeline for an inter-system scanperformed by the receiver of FIG. 1.

DETAILED DESCRIPTION OF AN EMBODIMENT OF THE INVENTION

FIG. 1 is a schematic circuit diagram representing a dual mode receiver10 for a mobile unit. For the purpose of explanation the dual modereceiver 10 is illustrated as being capable of receiving either WCDMA orGSM signals. It will be appreciated that other combinations ofreceivable signals are possible. Signals received at an antenna 11 areswitched by a switching component 12 to either a WCDMA receiver chain(shown in the upper part of FIG. 1) or a GSM receiver chain (shown inthe lower part of FIG. 1). Both receiver chains operate in essentiallythe same way insofar as the received signal is: filtered by a bandpassfilter (BPF) 13,14; amplified by a low noise amplifier 15,16;down-converted to a baseband frequency by a down-converter 17,18; andfiltered by a lowpass filter 19,20 before being input to a basebandcircuit and controller 22 for further processing.

The receiver 10 also comprises a voltage controlled temperaturecompensated crystal oscillator (VCTCXO) 24 that provides a referencefrequency signal to a phase-locked loop. The phase-locked loop comprisesa phase-locked loop integrated circuit (PLL) 25 (to be described indetail herein blow), a loop filter 26 and a voltage-controlledoscillator 27. The phase-locked loop generates a signal at a suitablefrequency to enable the down-converter 17, 18 in both the WCDMA and GSMreceiver chains to down-convert the received signals to a basebandlevel. This use of a phase-locked loop is well known and need not bedescribed in greater detail herein.

In addition to the aforementioned processing of down-converted signals,the baseband circuit and controller 22 also controls operation of thereceiver 10. The baseband circuit and controller 22 typically comprisesa control processor (not shown) that generates signals to cause theantenna switching component 12 to switch between the WCDMA chain and theGSM chain at the required time. The controller-generated signals areapplied to, among other things, the antenna switching component 12 and aPLL switching controller 28, which controls operation of thephase-locked loop.

Normally, a dual-mode receiver circuit would require a separatephase-locked loop for each of the WCDMA and GSM receiver chains.However, as shown in FIG. 1, a single switchable phase-locked loop ofthe kind described in international (PCT) patent applicationPCT/GB01/05610 may advantageously be used to provide a signal to eitherof the down-converter 17, 18 in the WCDMA and GSM receiver chains sincethe two receiver chains are never required to operate simultaneously.

FIG. 2 of the accompanying drawings is a schematic circuit diagramrepresenting in greater detail the PLL 25 of FIG. 1. The PLL 25 shown inFIG. 2 may be essentially the same as described in the aforementionedinternational (PCT) patent application PCT/GB01/05610. The PLL 25comprises a programmable divide-by-R counter 31, a programmabledivide-by-N counter 32 and a phase detector 33. The divide-by-R counter31 is driven by the VCTCXO (see FIG. 1). Two register sets 35,36, eachstore data defining a respective configuration for the PLL 25. Eachregister set 35,36 has an associated serial/parallel converter 37,38connected to receive data in serial form from the baseband circuit andcontrol 22 via a serial data interface 39. Each register set 37,38comprises a register 37R,38R for holding data for the divide-by-Rcounter 31, a register 37N,38N for holding data for the divide-by-Ncounter 32 and a register 37P,38P for holding data for the phasedetector 33. The phase detector data in the registers 37P,38P definesthe gain applied by the phase detector 33.

Also shown in FIG. 2 is a lock detector 40 coupled to the phase detector33 for providing an indication to the baseband circuit and control 22when the PLL 25 has locked onto the desired frequency, i.e. when it hasbecome stable. Switches 42,43 and 44 are provided to switch thedivide-by-R counter 31, the divide-by-N counter 32 and the phasedetector 33 between the two register sets 37,38. A further switch 45 isprovided to switch the serial data interface 39 from the basebandcircuit and control 22 between the two serial to parallel converters37,38. All of the switches 42 to 45 are controlled by a configurationselect control signal 46 generated by the baseband circuit andcontroller 22.

The switches are arranged so that when the first register set 35 iscoupled to the divide-by-R counter 31, the divide-by-N counter 32 andthe phase detector 33, the second register set 36 is coupled via theswitch 45 to the serial data interface 39 from the host microcontroller,and when the second register set 36 is connected to the divide-by-Ncounter 17, etc, the first register set 35 is connected to the serialdata interface 39. In this way, one set of registers 36,37 can be loadedwith new data while the other set of registers 36,37 is controllingoperation of the divide-by-N counter 31, etc. This provides an efficientway of switching between different frequencies by reducing the amount oftime that the PLL is inactive.

FIG. 3 of the accompanying drawings is a phase diagram in PN space,where the circumference of the circle 50 represents an entire PNsequence. Only part of the PN sequence is assigned to a mobile unit andthat part is centered in a search window W. When the phase (in PN space)of the signal generated by the phase-locked loop is centered on thewindow W at code position β the energy (E_(b)/N_(o)) in the receivedsignal will be at a maximum. This is represented by the energy curve E₁in FIG. 4. When the phase of the signal from the phase-locked loopchanges so that the signal is off center in the window W at positionβ-Δe the energy (E_(b)/N_(o)) in the received signal will be at a lowerlevel as represented by the curve E₂ in FIG. 4. As long as the phase ofthe signal from the phase-locked loop does not move out of the searchwindow W, the signal will be recoverable, even at a lower level ofenergy. However, if the phase changes to the extent that the signal liesoutside the search window W, the receiver will no longer be locked ontothe received signal and reception will be lost. Put another way thevalue of Δe should not be greater than ½W.

The receiver of FIG. 1 includes correlators (not shown) that correlatePN sequences in the received WCDMA signals with internally generated PNsequences in order to extract the correct data from the WCDMA signals ifthe clock source for the correlator (i.e. the phase-locked loop) is madeto run faster than necessary, the PN generators will advance too quicklyand, the correlation peak will appear to be behind in time. If the clockis made to run slow, the correlation peak will appear to be ahead intime because the PN generators will be running slower than expected.This can be thought of as the correlation peak “jumping” from its'aligned position to another position in the search window by an amountwhich is proportional to the net frequency error introduced by thealternate system scan.

When a mobile unit is in standby the frequency of the VCTCXO and hencethe phase-locked loop may well drift away from the frequency of theWCDMA system. This will occur because of tolerances of manufacture andchanges in the environment in which the mobile unit is located. As longas the drift does not result in a code phase difference greater than ½W,the mobile unit will be able to synchronize with the system when itcomes out of the standby state. Mobile units are designed so that thedrift is less than ½W.

As has been mentioned previously herein, the continuous nature of WCDMAsignals means that there is no natural break in the signals that wouldallow scanning for signals from other systems. When a mobile unit isrequired to monitor the strength of signals from cells in a new system,the mobile unit has to receive and decode signals from the surroundingcells of the new system and process the network information carried bythose signals. In order to do this, the receiver needs either to bephase locked before reception is attempted or to apply a post-receptionphase correction to the data before decoding is done.

This is done in the receiver of FIG. 1 by allowing the phase-locked looptemporarily to achieve phase lock with the GSM signals before startingthe received data sampling. This ensures that samples have correct phaseand no post correction is required. When a mobile unit is in a steadyWCDMA idle state, the VCTCXO and phase-locked loop are both frequencyand phase locked to the WCDMA system. While in the idle state the mobileunit will “wake up” periodically to monitor its assigned paging messagesfrom the WCDMA system. Therefore when scanning for GSM signals anyinduced frequency and phase errors introduced on to the referenceoscillator by the surrounding cell scans must be corrected before themobile unit next “wakes up” to monitor for WCDMA system paging message.

The phase-locked loop is therefore allowed to achieve lock using knownautomatic frequency control (AFC) techniques and while doing so, themagnitude and direction of the induced errors (an error vector) ismonitored together with the durations that the errors are applied for.By summing these error vectors, a resultant error vector can be foundand then used to apply a nullifying error of equal and oppositemagnitude to the VCTCXO (see FIG. 1). Thus, by the time that the mobileunit next has to “wake up” to monitor for WCDMA system paging data, theVCTCXO and phase-locked loop will once again be aligned for the WCDMAsystem, as if no other activity had occurred.

FIG. 5 of the accompanying drawings shows one example of a timeline foran inter-system scan performed by the receiver of FIG. 1. The timelinecovers an initial state 51 and seven intervals labeled 52 to 58. Lines61 and 62 represent frequency (VCTCXO frequency) and time axesrespectively. In the initial state 51 the receiver is tuned to receive,and is receiving, WCDMA signals. In this state the frequency is atf_(w), the receive frequency for the WCDMA signal.

In interval 52 which lasts for a time period T_(PLL) 1 the receiver ofFIG. 1 is initialized with data that will subsequently enable the GSMreceiver chain to receive signals from a GSM system. The period of timeT_(PLL) 1 depends on characteristics of the phase-locked loop, but oncethe phase-locked loop has been designed this period will be essentiallyconstant. Interval 53 represents the time T_(fc) taken for the receiverto receive initial (coarse) frequency correction data. The length oftime T_(fc) taken to receive this information depends on externalinfluences and is therefore indeterminate. Once the data has beenreceived it may be stored in the control circuit for quicker access, thestored data being compared from time to time with updating data from thesource (usually a system controller or base station) to ensure that itremains current. In intervals 52 and 53, the frequency remains at thereceiving frequency f_(w) of the WCDMA system.

At the end of interval 53, a coarse frequency adjustment is madedepending on the received data, which data is applied to thephase-locked loop. This offsets the frequency of the signal output fromthe phase-locked loop by Δf₁ to give a frequency approximately equal tothat of the GSM signals. This frequency offset is shown as a positivequantity in FIG. 5, but it could be a negative quantity. The frequencyoffset Δf₁ is applied for the whole of interval 54, corresponding to atime period T₁ during which better synchronization data is received anda better frequency offset estimation is calculated. At the end ofinterval 54, once a fine frequency offset Δf₂ (which can also be eitherpositive or negative) has been calculated, the fine frequency offsetΔf₂, is applied to the phase-locked loop. The fine frequency offsetoffsets the frequency of the signal output from the phase-locked loop byΔf₁ to give a frequency substantially equal to that of the GSM signals.

This marks the beginning of interval 55, which lasts for a time T₂.During interval 55 the receiver scans the GSM signal domain, andreceives and decodes the GSM system information. The values of T₁ and T₂are not fixed, because of the asynchronous nature of the signalreception during intervals 54 and 55, but T₁ and T₂ can be measured bythe controller as they happen. The controller therefore also calculatesa cumulative frequency error, which is the error introduced during theintervals 54 and 55, and calculates how long it will take (T_(c)) for acorrective frequency offset Δf_(c) to cancel that cumulative frequencyerror. The corrective frequency offset Δf_(c) is therefore applied ininterval 56 for a period of T_(c) seconds.

By the end of interval 56 there will be substantially no frequency errorin the operation of the phase-locked loop. Therefore in interval 57 thereceiver is reconfigured so that the WCDMA receive chain is againreceiving WCDMA signals from the WCDMA system. There is a short delay ofduration before the receiver settles into a steady state and this isrepresented by the time period T_(PLL) 2. Like T_(PLL) 1 the period oftime T_(PLL) 2 depends on characteristics of the phase-locked loop, butis essentially constant.

The corrective frequency offset Δf_(c) is calculated in the followingmanner. The cumulative error Δβ introduced during intervals 54 and 55 isa function of both frequency and time. Therefore:Δβ=T ₁ ·Δf ₁ +T ₂ ·Δf ₂

This has to be balanced by T_(c). Δf_(c). It thus follows thatT _(c) ·Δf _(c) =T ₁·Δf₁ +T ₂·Δf₂.

Time periods T₁ and T₂ are set to be sufficiently long to ensurereception of GSM sync and system data and are therefore known. The timeperiods T_(PLL) 1 and T_(PLL) 2 are essentially constant and it followsthat the end of interval 57 (when reception of WCDMA signals resumes) isat a known point in time. T_(c) is calculated working back from the endof interval 57 to the end of interval 55. The time period T2 may beincreased or decreased, if required, in order to ensure thatreconnection to the WCDMA requires at the desired time (i.e. the end ofinterval 57). It is a simple matter of design to ensure that Δf_(c) isnever so great as to cause the code phase of the receiver to driftoutside the window W in FIG. 3. Ideally, therefore, there will be nodifference between the cumulative frequency error for a period of timeduring which a GSM scan is performed and one in which the mobile unitsimply remains in standby. In practice, manufacturing tolerances mayintroduce a slight difference, but those same tolerances will make thereceiver well able to cope with any small differences, which maytherefore be ignored.

As will have been appreciated from the foregoing description thereference oscillator is allowed temporarily to achieve phase lock withthe new system so that the receiver can scan the GSM signal domain andreceive GSM data with the correct phase, so that no post correction isrequired. This approach requires very little overhead in circuitcomplexity, memory space and energy consumption. The error estimation isdetermined before returning to the WCDMA system and applied during thereceiver reconfiguration period, so that when the WCDMA system isre-acquired, the error is substantially reduced, if not completelyeliminated.

Having thus described the invention by reference to a preferredembodiment it is to be well understood that the embodiment in questionis exemplary only and that modifications and variations such as willoccur to those possessed of appropriate knowledge and skills may be madewithout departure from the spirit and scope of the invention as setforth in the appended claims and equivalents thereof.

1. A method of controlling a plural-mode receiver, capable of receivingsignals from a first communication system or signals from a second,different communication system, to reduce frequency errors associatedwith the receiver scanning for signals of the second communicationsystem while receiving signals of the first communication system, themethod comprising: changing parameters of a reference oscillator of thereceiver so that the oscillator oscillates at frequencies related tosignals of the second communication system; recording the change infrequency of the oscillator resulting from the adjustment; receivingsignals of the second communication system for a period of time;recording the period of time; calculating from the recorded change andthe recorded period of time an error vector; and changing parameters ofthe reference oscillator, including applying the calculated errorvector, so that the oscillator oscillates at frequencies related tosignals of the first communication system.
 2. A method as claimed inclaim 1, further comprising: receiving data relating to the frequenciesof signals of the second communication system; determining from thereceived data the parameters of the reference oscillator to cause theoscillator to oscillate at approximately the frequencies related tosignals of the second communication system.
 3. A method as claimed inclaim 2, further comprising: receiving further data relating to thefrequencies of signals of the second communication system; determiningfrom the received data corrections to be applied to the parameters ofthe reference oscillator to cause the oscillator to oscillate atsubstantially the frequencies related to signals of the secondcommunication system.
 4. A method as claimed in claim 3, wherein therecorded change in frequency includes the change associated withoscillating at approximately the frequencies related to signals of thesecond communication system and the change associated with oscillatingat substantially the frequencies related to signals of the secondcommunication system.
 5. A method as claimed in claim 3 or 4, whereinthe period of time comprises both time spent oscillating atapproximately the frequencies related to signals of the secondcommunication system and time spent oscillating at substantially thefrequencies related to signals of the second communication system.
 6. Amethod as claimed in claim 1, further comprising receiving signals ofthe of the second communication system containing information pertainingto the second system.
 7. A method as claimed in claim 1, wherein thescanning is effected while the receiver is in an idle mode.
 8. Aplural-mode receiver apparatus for receiving signals from a firstcommunication system or signals from a second, different communicationsystem, the apparatus comprising: a first receiver chain for receivingsignals of the first communication system; a second receiver chain forreceiving signals of the second communication system; a referenceoscillator for generating a reference signal for the first receiverchain and the second receiver chain; and a controller for: changingparameters of the reference oscillator so that the oscillator oscillatesat frequencies related to signals of the second communication system;recording the change in frequency of the oscillator resulting from theadjustment; recording a period of time during which signals of thesecond communication system are received by the second receiver chain;calculating from the recorded change and the recorded period of time anerror vector; and changing parameters of the reference oscillator,including applying the calculated error vector, so that the oscillatoroscillates at frequencies related to signals of the first communicationsystem.
 9. An apparatus as claimed in claim 8, further comprising meansfor receiving data relating to the frequencies of signals of the secondcommunication system and wherein the controller is arranged to determinefrom the received data the parameters of the reference oscillator tocause the oscillator to oscillate at approximately the frequenciesrelated to signals of the second communication system.
 10. An apparatusas claimed in claim 9, further comprising means for receiving furtherdata relating to the frequencies of signals of the second communicationsystem, and wherein the controller is arranged to determine from thereceived data corrections to be applied to the parameters of thereference oscillator to cause the oscillator to oscillate atsubstantially the frequencies related to signals of the secondcommunication system.
 11. An apparatus as claimed in claim 10, whereincontroller is arranged to record changes in frequency that include thechange associated with oscillating at approximately the frequenciesrelated to signals of the second communication system and the changeassociated with oscillating at substantially the frequencies related tosignals of the second communication system.
 12. An apparatus as claimedin claim 10 or 11, wherein controller is arranged to calculate theperiod of time from both time spent oscillating at approximately thefrequencies related to signals of the second communication system andtime spent oscillating at substantially the frequencies related tosignals of the second communication system.
 13. An apparatus as claimedin claim 8, wherein the controller is operable while the receiver is inan idle mode.
 14. A receiver for receiving signals of a firstcommunication system and signals of a second communication system, thereceiver comprising a receiving circuit tunable to receive signals ofthe first and second communication systems, the receiver being arrangedso that, while tuned to receive signals of the first communicationsystem, the receiving circuit can be briefly retuned to receive signalsof the second communication system before being tuned back to receiveagain signals of the first communication system, and so that acorrection is made when tuning back to signals of the firstcommunication system depending on tuning changes made while retuning andreceiving signals of the second communication system and the duration ofthe changes.
 15. A receiver as claimed in claim 14, wherein thereceiving circuit comprises a first receiver chain operable to receivesignals from a first communications system and a second receiver chainoperable to receive signals from a second communications system.
 16. Areceiver as claimed in claim 15, further comprising a phase-locked loopcircuit associated with the first receiver chain and with the secondreceiver chain.
 17. A receiver as claimed in claim 16, wherein thephase-locked loop circuit comprises a single phase-locked loopconfigurable to output a signal at a first frequency related withsignals of the first communications system or to output a signal at asecond frequency related with signals of the second communicationssystem.
 18. A receiver as claimed in claim 16 or 17, wherein thephase-locked loop circuit comprises a voltage-controlledtemperature-compensated crystal oscillator (VCTCXO) to which thecorrection is made.
 19. A receiver as claimed in claim 15, wherein thefirst receiver chain is configured to receive signals of a continuousfrequency division duplex system.
 20. A receiver as claimed in claim 15,wherein the second receiver chain is configured to receive signals of atime division duplex system.
 21. A receiver as claimed in claim 19,wherein the first receiver chain is configured to receive WCDMA signals.22. A receiver as claimed in claim 20, wherein the second receiver chainis configured to receive GSM signals.
 23. A receiver as claimed in claim15, further comprising a controller for controlling the receiver circuitto cause the same to tune between the signals of the first and secondcommunication systems.
 24. A receiver as claimed in claim 23, whereinthe controller is operable to calculate the correction from the tuningchanges made while retuning and receiving signals of the secondcommunication system and the duration of the changes and to apply thecorrection to the receiver circuit.
 25. A method of receiving signals ofa first communication system and signals of a second communicationsystem, the method comprising tuning a receiving circuit to receivesignals of the first communication system, retuning the receiver circuitto receive signals of the second communication system, tuning thereceiver back to receive again signals of the first communicationsystem, determining tuning changes made while retuning and receivingsignals of the second communication system and the duration of thechanges, calculating from the changes and duration of the changes acorrection to be made to the tuning, and making the calculatedcorrection when tuning back to signals of the first communicationsystem.
 26. An apparatus for controlling a plural-mode receiver, capableof receiving signals from a first communication system or signals from asecond, different communication system, to reduce frequency errorsassociated with the receiver scanning for signals of the secondcommunication system while receiving signals of the first communicationsystem, comprising: means for changing parameters of a referenceoscillator of the receiver so that the oscillator oscillates atfrequencies related to signals of the second communication system; meansfor recording the change in frequency of the oscillator resulting fromthe adjustment; means for receiving signals of the second communicationsystem for a period of time; means for recording the period of time;means for calculating from the recorded change and the recorded periodof time an error vector; and means for changing parameters of thereference oscillator, including applying the calculated error vector, sothat the oscillator oscillates at frequencies related to signals of thefirst communication system.
 27. The apparatus as claimed in claim 26,further comprising: means for receiving data relating to the frequenciesof signals of the second communication system; means for determiningfrom the received data the parameters of the reference oscillator tocause the oscillator to oscillate at approximately the frequenciesrelated to signals of the second communication system.
 28. The apparatusas claimed in claim 27, further comprising: means for receiving furtherdata relating to the frequencies of signals of the second communicationsystem; means for determining from the received data corrections to beapplied to the parameters of the reference oscillator to cause theoscillator to oscillate at substantially the frequencies related tosignals of the second communication system.
 29. The apparatus as claimedin claim 28, wherein the recorded change in frequency includes thechange associated with oscillating at approximately the frequenciesrelated to signals of the second communication system and the changeassociated with oscillating at substantially the frequencies related tosignals of the second communication system.
 30. The apparatus as claimedin claim 28, wherein the period of time comprises both time spentoscillating at approximately the frequencies related to signals of thesecond communication system and time spent oscillating at substantiallythe frequencies related to signals of the second communication system.31. The apparatus as claimed in claim 26, wherein the signals of the ofthe second communication system contain information pertaining to thesecond system.
 32. The apparatus as claimed in claim 26, wherein thescanning is effected while the receiver is in an idle mode.
 33. Anapparatus for receiving signals of a first communication system andsignals of a second communication system, the apparatus comprising meansfor tuning a receiving circuit to receive signals of the firstcommunication system, means for retuning the receiver circuit to receivesignals of the second communication system, means for tuning thereceiver back to receive again signals of the first communicationsystem, means for determining tuning changes made while retuning andreceiving signals of the second communication system and the duration ofthe changes, means for calculating from the changes and duration of thechanges a correction to be made to the tuning, and means for making thecalculated correction when tuning back to signals of the firstcommunication system.